Hardware Emulation Platform Hardware, Software and Design Methodology

Hardware Emulation: Increasingly complex and sophisticated ICs and ASICs, coupled with shrinking design cycles, require tools that elevate design emulation and verification to an unprecedented level of performance, capacity, speed, and flexibility. The cost of design iterations due to errors and design faults is growing exponentially. Extremely large chip sets require enormous quantities of test vectors and the execution of long software application suites. Contemporary large system designs and especially the system-on-a-chip (SoC) designs require fast prototyping in order to keep the development time competitive.
The purpose of this research is to identify these problems and develop methods, practices, and hardware to make the design flow as smoothly as possible. The nature of the design interfaces is especially examined. Therefore, conventional simulations are inapplicable and it is the goal of the BiggaScale Emulation Engine (BEE) to build a system capable of exploring new system concepts and algorithms for wireless communication. The focus is on gaining experience with the system level aspects of a design before committing to an ASIC implementation. The goal of the BEE project is to build a machine that can emulate, with reasonable speed, the digital and analog parts of a chip that can do 100 billion operations per second.